The present invention relates to a semiconductor device in which a plurality of semiconductor chips are mounted in a single package, or to a so-called multi-chip package (MCP), and to a method for testing such a semiconductor device.
Japanese Laid-Open Patent Publication No. 2003-77296 describes a conventional semiconductor device. The semiconductor device is a single package including a logic chip (logic LSI) provided with a data processing function and a memory chip (memory LSI) for storing data that has been or will be processed by the logic chip. The logic chip includes a digital signal processor (DSP). The logic circuit processes predetermined data provided to the DSP and provides the processed data to the memory chip. The data is written to or stored in a memory circuit, such as a flash memory included in the memory chip. Further, the data processed by the logic circuit may be written beforehand to the memory circuit. A semiconductor device having such a configuration reduces the package cost.
Further, any combination of the LSIs mounted in the package may be selected. This reduces the risks and costs for developing a system LSI.
Before a packaged semiconductor device is shipped out of a factory, each chip is tested to determine that the chip is functioning properly. An MCP including a logic chip and a memory chip normally includes many terminal pins. Thus, a memory tester capable of testing only packages having a small number of terminal pins cannot be used to test an MCP. In this case, a logic tester capable of testing an MCP having many terminal pins is used. A typical logic tester generates test signals that are more complicated than those generated by a memory tester and makes determinations based on the test signals. However, although the logic tester may be applied to a package having many terminals pins, the number of packages that may be simultaneously tested is small. Further, when a memory chip in an MCP is an electrically rewritable non-volatile memory such as a flash memory, the time required to write data to the memory chip is long. Accordingly, the testing cost is high when conducting tests with a logic tester that can simultaneously test only a small number of packages.